Intel tsmc 5nm customer
During the last years we saw a small battle through the process node. Now is that the head and Intel are addressing your head now. However, for new research items that we suggest changing how to change the name of the node, you can illuminate on the process node on your head. Paper
is summarized by nine authors from MIT, Berkeley, Stanford and TSMC, and "density measurement criteria for semiconductor technology".
Researchers suggest that the method of standardization of progress in the manufacture of semiconductor lithography should be changed. The paper suggests that we dig a transistor door (for example, 7 nm or 10 nm) as a measure of high quality and performance. Instead, they must focus on the transistor's density.
Interestingly, this is the route that Intel has been proposed for years, but TSMC researchers support loans for this idea. To understand the problem, it is important to examine how the industry is named. Due to the appearance of AMD and Intel Chips, 14 nm, 12 nm, 10 nm and 7 nm have already heard. The smaller this number, the better it is better. However, technologies progress and their names can no longer be appropriate.
The way in which all companies are close to this industry and have changed how we standardize technology. The name of the process node is the point where the marketing determination is more than scientific terms.
"This label is separated in the last 10 years promoted by competitive marketing and can not transmit more than the length of the actual minimum door and can not transmit other essential characteristics." In this document to say.
This will promote the discussion of Intel's discussion in 2017. He has been difficult to extend the process node and has more difficult to notice and apply them to the entire industry.
"Some companies have left this rule, but even if the density is not at least not, no, at all, the name of the node continued. As a result, the name of the node is standing in the normal Moore, it is a poor indicator of the place. "
Another thing to consider will happen when the name falls below 1 nm? Since TSMC is working on a process node of 2 nm, we seem to be before what was previously thought.
This may be a change that is necessary to measure density progress, which may be a change that is needed before everything is confusing. Dissertation
also uses the semiconductor industry from its foundation, as a means to measure the progress of continuous technology (the minimum length of the transistor door). This metric is a time delay today. As a replacement, we propose the density metrics that we try to capture progress in the technology of semiconductor devices. "
The method proposed by the research document includes logical, memory, connectivity metric (LMC).
This replaces a single transistor length for 3-piece numbers instead. This number will consist of DL (density of logical transistors), DM (density of the main memory) and DC (connection density between the main memory and logic). This will lead to the type of system measuring formula, not the direct measure of the lithography process that we are accustomed to see.
Researchers say this leads to more precise ways of measuring and comparing process nodes.
Mark Bohr The solution placed forward was measuring the density of two nand input cells that will produce two measurements of transistor / mm2. However, this is not determined for the SRAM cell size account, so Intel recommends using another measured value along with logical density.
Intel generally leads to transistor density. By its process of 10 nm, Intel reports a density of 100.76 Mtr / mm 2, but TSMC reports 91.2 MTR / mm 2 for its 7 nm process.
This can change the industry, especially for competition between Intel and AMD will be interesting.
It will probably be difficult to persuade the entire industry that is in accordance with the metric criteria of universal density. However, when Intel on board and this research dissertation comes from someone from TSMC, the debate is probably close to the reality of what we can think.